The Configurable, Highly Parallel (CHiP) Approach for Signal Processing Applications
نویسنده
چکیده
A VLSI design methodology, built around the CHiP architecture, is described. The switch lattice of the CHiP architecture is the primary design abstraction. The lattice is a flexible design medium with constraints that mirror those of raw silicon. An eight point pipelined Fast Fourier Transform design, used as a funning example, is of independent interest for its locally connected layout. The work described herein is part of the Blue CHiP Project and is supported in part by the Office of Naval Research Contracts N00014-BO-K-OB16 and NOOD14-Bl-K-0360. The latter is Special Research Opportunities Task SRO-100. This paper appeared in the Proceedings of the Technical Symposium East. Society of Photo-Optical Instrumentation Engineers, 1982. ...
منابع مشابه
Design and Implementation of a High Speed Systolic Serial Multiplier and Squarer for Long Unsigned Integer Using VHDL
A systolic serial multiplier for unsigned numbers is presented which operates without zero words inserted between successive data words, outputs the full product and has only one clock cycle latency. 
The multiplier is based on a modified serial/parallel scheme with two adjacent multiplier cells. Systolic concept is a well-known means of intensive computational task through replication of fu...
متن کاملDesign and Implementation of a High Speed Systolic Serial Multiplier and Squarer for Long Unsigned Integer Using VHDL
A systolic serial multiplier for unsigned numbers is presented which operates without zero words inserted between successive data words, outputs the full product and has only one clock cycle latency. The multiplier is based on a modified serial/parallel scheme with two adjacent multiplier cells. Systolic concept is a well-known means of intensive computational task through replication of func...
متن کاملReconfigurable Logic for Systems on a Chip
The electronic systems of the future will be implemented in terms of multi-million gate “systems on a chip”. These systems will require an enormous investment in design and manufacturing; yet the pace of technological change (e.g., new algorithm development, new processor and memory designs) and ever changing requirements puts them in danger of obsolescence soon after they are created – applica...
متن کاملDesign and Implementation of Digital Demodulator for Frequency Modulated CW Radar (RESEARCH NOTE)
Radar Signal Processing has been an interesting area of research for realization of programmable digital signal processor using VLSI design techniques. Digital Signal Processing (DSP) algorithms have been an integral design methodology for implementation of high speed application specific real-time systems especially for high resolution radar. CORDIC algorithm, in recent times, is turned out to...
متن کاملParallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools
In order to develop a low-power and highperformance SoC platform for multimedia applications, the Parallel Architecture Core (PAC) project was initiated in Taiwan in 2003. AVLIW digital signal processor (PACDSP) has been developed from a proprietary instruction set with multimedia-rich instructions, a complexity-effective microarchitecture with an innovative distributed & ping-pong register org...
متن کامل